1. Field of the Invention
The invention relates in general to a word line boost circuit and method, and more particularly to a word line boost circuit and method capable of improving a reading speed.
2. Description of the Related Art
Referring to FIG. 1, a circuit diagram of a conventional word line boost circuit is shown. A word line boost circuit 100 includes a first pump circuit 110, a first transistor M1, a second transistor M2, a zener diode 120, a first switch Q1, and a second pump circuit 130. The first pump circuit 110 receives an address transfer detection (ATD) signal and outputs a gate boosted signal AVXVF. The first pump circuit 110 substantially includes three stages of sub-pump circuits for sequentially increasing a voltage level of the gate boosted signal AVXVF. The first transistor M1 has a control terminal for receiving the gate boosted signal AVXVF and a second terminal coupled to a target word line TWL.
The second transistor M2 has a first terminal coupled to the control terminal of the first transistor M1. A control terminal of the second transistor M2 is coupled to the first terminal of the second transistor M2. The zener diode 120 has a first end coupled to a second terminal of the second transistor M2. The first switch Q1 has a control terminal for receiving the ATD signal ATD, a first terminal coupled to a second end of the zener transistor 120, and a second terminal for receiving a ground voltage GND. The second pump circuit 130 receives a trigger signal ATDBOOST and accordingly outputs a boost signal AVXBST to boost the target word line TWL.
The word line boost circuit 100 achieves the purpose of boosting the target word line TWL by timing control. Referring to FIG. 2, a timing diagram of the word line boost circuit 100 is shown. In the word line boost circuit 100, when the voltage level of the gate boosted signal AVXVF is equal to a predetermined voltage, due to the component characteristic of the zener diode 120, the voltage level of the gate boosted signal AVXVF can be stably maintained to the predetermined voltage. The predetermined voltage is a sum of a threshold voltage of the second transistor M2 and a voltage drop across the zener diode 120. Therefore, the time (t2-t1) for the voltage level of the ATD signal ATD to be kept at a high level H should be long enough such that the voltage level of the gate boosted signal AVXVF can be successfully lifted up to the predetermined voltage by the first pump circuit 110.
After the time t2, that is, after the voltage level of the gate boosted signal AVXVF has been the predetermined voltage, the voltage level of the trigger signal ATDBOOST is transferred to the high level H and the second pump circuit 130 is triggered to lift up the boost signal AVXBST to boost the target word line TWL. However, the conventional word line boost circuit 100 can increase the voltage level of the trigger signal ATDBOOST to the high level H only after the time t2, which wastes much time.